1. Field of the Invention
This invention relates generally to integrated circuits. More particularly, it relates to the design of a package shape improving the reliability of wire-bonds between an integrated circuit wafer chip and the input/output (I/O) pins of a packaged integrated circuit.
2. Background of Related Art
Wire-bond failure at the pin level in integrated circuits is an important concern. An integrated circuit can be rendered non-functional with even a single wire-bond failure.
Integrated circuit wafer chips (i.e., "dies") are very small devices, often comprising tens or hundreds of thousands of transistors and other devices within an area much smaller than a dime. While many of the circuit connections are internal within an integrated circuit, it is also necessary to connect some of the internal wires with signals from external sources/sinks, e.g., with signals to and/or from other integrated circuits, with a power source, etc. Typically, electrical pads are formed on the outer perimeter of the integrated circuit, and very small wires are bonded between each of the electrical pads and an assigned pin in a wire frame ultimately forming the external pins of an integrated circuit. After the integrated circuit wafer chip (i.e., the die) is wire-bonded to the pins, the die and the wire-bonds are sealed and protected in a hermetically sealed plastic or ceramic encasement. After encasement, the external pins are cut away from a supporting frame and shaped into the desired form, e.g., straight down or out for mounting in through-hole printed circuit board applications, or bent into a "J" or "L" shape for surface-mount applications.
The wire-bonding between the various pads on the integrated circuit wafer chip and the pins is a delicate process, either performed by hand for small-volume productions, or performed by machine to fulfill high-volume needs.
The flexibility of the wire-bonds allow some expansion and contraction of the different materials (i.e., between the steel of the pins vs. the semiconductor material of the integrated circuit wafer chip). Unfortunately, flexible wire-bonds are extremely fragile. For instance, wire-bonds are typically formed of bare wire and as such must not touch an adjacent flexible wire-bond or a short circuit would be caused between adjacent pins of the integrated circuit. Moreover, the flexible wire bonds are very thin and thus are easily broken. In some instances, multiple wire bonds are formed between a particular pad area and the desired pin, multiple pins may be used, or a thicker wire-bond may be used, to provide added reliability and/or to reduce a resistance between the relevant pad of the integrated circuit wafer and its pin.
It is desirable to minimize the overall size of a packaged integrated circuit. Thus, integrated circuits having a significant number of external pins are typically formed on all four sides of the rectangular (or square) hermetically sealed package. The greater the number of necessary external electrical connections, the larger the package.
FIG. 4 depicts the pins 502 of a conventional rectangular (or square) integrated circuit package 500 bonding with respective wire-bonds 552 to relevant pads on an integrated circuit wafer chip in a central portion 520.
In particular, various electrical pads of a relevant integrated circuit wafer chip are wire-bonded with point-to-point wire-bonds 552 to the inner ends of respective pins 502 formed on the four sides of an integrated circuit package 500. Afterwards, the integrated circuit wafer chip 520, wire-bonds 552 and inner portions of the pins 502 are hermetically sealed with a plastic or ceramic encasement to protect the wire-bonds as well as the integrated circuit wafer chip itself. Thereafter, the pins 502 are appropriately formed, e.g., into a surface mount or through-hole type configuration, and a supporting outer frame holding the pins 502 in place during the wire-bonding and packaging process is cut off, resulting in a completed integrated circuit ready for final testing and inclusion into a printed circuit board.
Packaging yield is directly proportional to the success of the wire-bonding of the various pads on the integrated circuit wafer chip (i.e., die) 520 to the I/O pins 502. If any one wire-bond 552 fails (e.g., breaks or shorts to another wire-bond 552), it is likely that the entire integrated circuit device will fail. Moreover, it is unlikely in most cases that such an integrated circuit wafer chip can be recovered for re-work, particularly after it is encased, partly due to the frailty of the integrated circuit wafer chip 520 and wire-bonds 552, and partly because the labor required to perform such re-work typically costs much more than the value of the failed device.
Some amount of the success of wire-bonding is due at least in part to the angle of the individual pins 502 with respect to the bonding wire-bond 552. However, conventional rectangular-shaped integrated circuits can potentially result in small wire-bond contact angles with respect to the pins 502, particularly toward the corners 570-573 of the integrated circuit.
Thus, rectangular integrated circuit packages can potentially result in small wire-bond contact angles, which may become undesirable. Conventionally, if the contact angle becomes smaller than a certain lower limit, the size of the overall integrated circuit is increased to accommodate the smaller distances between wire-bonds.
FIG. 5 shows a conventional rectangular integrated circuit 500 as shown in FIG. 4, but with an emphasis placed on two exemplary pins 502a and 502b, and their corresponding wire-bonds 552a and 552b.
Optimally, the angle of any particular pin 502 with respect to the bonding wire-bond 552 is 90.degree.. For instance, the central pin 502a as shown in FIG. 5 enjoys this optimal angle with its wire-bond 552a forming a 90.degree. angle with respect to an edge of the integrated circuit whereon the pins 502 are mounted. However, most pins do not enjoy this optimal angle.
For instance, the pins toward the corners 570-573 of the integrated circuit 500 require the formation of a smallest angle .alpha. between the side of the integrated circuit 500 on which the relevant pin, e.g., 502b is mounted, and its bonding wire-bond 552b. The angles with respect to the pins between the optimal pin 502a and the pin suffering the smallest angle .alpha. gradually stray from the optimal 90.degree. angle to the smallest angle .alpha.. As this angle decreases, the probability of failure of the relevant wire-bond 552 increases. The particular wire-bond 552 may fail either when the wire-bonding is performed, or even after a period of time due to material exhaustion.
There is a need for an improved integrated circuit technique which reduces the possibility of wire-bond failure, particularly with respect to pins conventionally located towards the corners of a conventional rectangular-shaped integrated circuit.